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1 2 3 4 5 6 7 8 n/c _ v cc v e v o gnd + n/c v f features ? compact so8 package very high speed-10 mbit/s superior cmr-10 kv/s fan-out of 8 over -40c to +85c logic gate output strobable output wired or-open collector u.l. recognized (file # e90700) description the hcpl-0600/0601optocouplers consist of a 870 nm algaas led, optically coupled to a very high speed integrated photodetector logic gate with a strobable out- put. the devices are housed in a compact small-outline package. this output features an open collector, thereby permitting wired or outputs. the coupled parameters are guaranteed over the temperature range of -40c to +85c. a maximum input signal of 5 ma will provide a minimum output sink current of 13 ma (fan out of 8). an internal noise shield provides superior common mode rejection of typically 10 kv/s. applications ground loop elimination lsttl to ttl, lsttl or 5-volt cmos line receiver, data transmission data multiplexing switching power supplies pulse transformer replacement computer-peripheral interface input enable output hhl lhh hlh llh hncl lnch a 0.1 f bypass capacitor must be connected between pins 8 and 5. (see note 1) truth table (positive logic) high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 package dimensions lead coplanarity : 0.004 (0.10) max 0.202 (5.13) 0.182 (4.63) 0.021 (0.53) 0.011 (0.28) 0.050 (1.27) typ 0.244 (6.19) 0.224 (5.69) 0.143 (3.63) 0.123 (3.13) 0.008 (0.20) 0.003 (0.08) 0.010 (0.25) 0.006 (0.16) seating plane 0.164 (4.16) 0.144 (3.66) 0.019 [0.48] pin 1 note all dimensions are in inches (millimeters) single-channel circuit drawing ? ? 2001 fairchild semiconductor corporation ds300397 4/30/01 1 of 11 www.fairchildsemi.com
recommended operating conditions parameter symbol min max units input current, low level i fl 0 250 a input current, high level i fh *6.3 15 ma supply voltage, output v cc 4.5 5.5 v enable voltage, low level v el 0 0.8 v enable voltage, high level v eh 2.0 v cc v operating temperature t a -40 +85 c fan out (ttl load) n 8 parameter symbol value units storage temperature t stg -55 to +125 c operating temperature t opr -40 to +85 c lead solder temperature t sol 260 for 10 sec c emitter i f 50 ma dc/average forward input current enable input voltage v e 5.5 v not to exceed v cc by more than 500 mv reverse input voltage v r 5.0 v power dissipation p i 45 mw detector supply voltage v cc 7.0 v (1 minute max) output current i o 50 ma output voltage v o 7.0 v collector output power dissipation p o 85 mw absolute maximum ratings (no derating required up to 85c) * 6.3 ma is a guard banded value which allows for at least 20 % ctr degradation. initial input current threshold value is 5.0 m a or less high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 www.fairchildsemi.com 2 of 11 4/30/01 ds300397
high speed-10 mbit/s logic gate optocouplers ac characteristics test conditions device symbol min typ max unit propagation delay time (note 3) (t a =25c) all t plh 20 45 75 ns to output high level (r l = 350 1 , c l = 15 pf) (fig. 12) 100 propagation delay time (note 4) (t a =25c) all t phl 25 45 75 ns to output low level (r l = 350 1 , c l = 15 pf) (fig. 12) 100 pulse width distortion (r l = 350 1 , c l = 15 pf) (fig. 12) all t phl -t plh 335ns output rise time (10-90%) (r l = 350 1 , c l = 15 pf) all t r 50 ns (note 5) (fig. 12) output fall time (90-10%) (r l = 350 1 , c l = 15 pf) all t f 12 ns (note 6) (fig. 12) enable propagation delay time (i f = 7.5 ma, v eh = 3.5 v) to output high level (r l = 350 1 , c l = 15 pf) all t elh 20 ns (note 7) (fig. 13) enable propagation delay time (i f = 7.5 ma, v eh = 3.5 v) to output low level (r l = 350 1 , c l = 15 pf) all t ehl 20 ns (note 8) (fig. 13) common mode (r l = 350 1 ) (t a =25c) v cm = 10 v hcpl-0600 10,000 transient immunity (i f = 0 ma, v oh (min.) = 2.0 v) cm h (at output high level) (note 9)(fig. 14) v cm = 50 v hcpl-0601 5000 10,000 v/s common mode (r l = 350 1 ) (t a =25c) v cm = 10 v hcpl-0600 10,000 transient immunity (i f = 7.5 ma, v ol (max.) = 0.8 v) cm l (at output low level) (note 10)(fig. 14) v cm = 50 v hcpl-0601 5000 10,000 v/s switching characteristics (t a = -40c to +85c, v cc = 5 v, i f = 7.5 ma unless otherwise specified.) parameter test conditions symbol min typ** max unit emitter (i f = 10 ma) v f 1.3 ? 1.8 v input forward voltage t a =25c 1.4 1.75 input reverse breakdown voltage (i r = 10 a) b vr 5.0 v input capacitance (v f = 0, f = 1 mhz) c in 60 pf input diode temperature coefficient (i f = 10 ma) v f / t a -1.4 mv/c detector high level supply current (v cc = 5.5 v, i f = 0 ma) i cch 710ma (v e = 0.5 v) low level supply current (v cc = 5.5 v, i f = 10 ma) i ccl 913ma (v e = 0.5 v) low level enable current (v cc = 5.5 v, v e = 0.5 v) i el -0.8 -1.6 ma high level enable current (v cc = 5.5 v, v e = 2.0 v) i eh -0.6 -1.6 ma high level enable voltage (v cc = 5.5 v, i f = 10 ma) v eh 2.0 v low level enable voltage (v cc = 5.5 v, i f = 10 ma) (note 2) v el 0.8 v individual component characteristics electrical characteristics (t a = -40 c to +85c unless otherwise specified.) hcpl-0600 hcpl-0601 ds300397 4/30/01 3 of 11 www.fairchildsemi.com
characteristics test conditions symbol min typ** max unit (relative humidity = 45%) input-output (t a = 25c, t = 5 s) i i-o 1.0* a insulation leakage current (v i-o = 3000 vdc) (note 11) withstand insulation test voltage (rh < 50%, t a = 25c) v iso 2500 v rms (note 11) ( t = 1 min.) resistance (input to output) (v i-o = 500 v) (note 11) r i-o 10 12 1 capacitance (input to output) (f = 1 mhz) (note 11) c i-o 0.6 pf isolation characteristics (t a = -40c to +85c unless otherwise specified.) ** all typical values are at v cc = 5 v, t a = 25c 1. the v cc supply to each optoisolator must be bypassed by a 0.1f capacitor or larger. this can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package v cc and gnd pins of each device. 2. enable input - no pull up resistor required as the device has an internal pull up resistor. 3. t plh - propagation delay is measured from the 3.75 ma level on the high to low transition of the input current pulse to the 1.5 v level on the low to high transition of the output voltage pulse. 4. t phl - propagation delay is measured from the 3.75 ma level on the low to high transition of the input current pulse to the 1.5 v level on the high to low transition of the output voltage pulse. 5. t r - rise time is measured from the 90% to the 10% levels on the low to high transition of the output pulse. 6. t f - fall time is measured from the 10% to the 90% levels on the high to low transition of the output pulse. 7. t elh - enable input propagation delay is measured from the 1.5 v level on the high to low transition of the input voltage pulse to the 1.5 v level on the low to high transition of the output voltage pulse. 8. t ehl - enable input propagation delay is measured from the 1.5 v level on the low to high transition of the input voltage pulse to the 1.5 v level on the high to low transition of the output voltage pulse. 9. cm h - the maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., v out > 2.0 v). measured in volts per microsecond (v/s). 10. cm l - the maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e., v out < 0.8 v). measured in volts per microsecond (v/s). 11. device considered a two-terminal device: pins 1,2,3 and 4 shorted together, and pins 5,6,7 and 8 shorted together. notes dc characteristics test conditions symbol min typ** max unit high level output current (v cc = 5.5 v, v o = 5.5 v) i oh 100 a (i f = 250 a, v e = 2.0 v) (note 2) low level output voltage (v cc = 5.5 v, i f = 5 ma) v ol .35 0.6 v (v e = 2.0 v, i ol = 13 ma) (note 2) input threshold current (v cc = 5.5 v, v o = 0.6 v, i ft 35ma v e = 2.0 v, i ol = 13 ma) transfer characteristics (t a = -40c to +85c unless otherwise specified.) high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 www.fairchildsemi.com 4 of 11 4/30/01 ds300397
high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 ds300397 4/30/01 5 of 11 www.fairchildsemi.com fig. 1 forward current vs. input forward voltage v f - forward voltage (v) 1.100 1.200 1.300 1.400 1.500 1.600 i f - forward current (ma) 0.01 0.1 1 10 100 1000 t a = 25?c fig. 2 output voltage vs. forward current i oh - high level output current (?) i th - input threshold current (ma) fig. 3 input threshold current vs. temperature t a - temperature (?c) t a - temperature (?c) -60 -40 -20 0 20 40 60 80 100 0 1 2 3 4 5 6 r l = 350 ? r l = 1 k ? v cc = 5.0 v v o = 0.6 v fig. 4 high level output current vs. temperature -60 -40 -20 0 20 40 60 80 100 0 2 4 6 8 v cc = 5.5 v v o = 5.5 v v e = 2.0 v i f = 250 ? i f - forward input current (ma) 0123456 v o - output voltage (v) 0 1 2 3 4 5 6 v cc = 5 v t a = 25 ?c
high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 fig. 5 low level output voltage vs. temperature t a - temperature ( ? c) t a - temperature ( ? c) t a - temperature ( ? c) -60 -40 -20 0 20 40 60 80 100 v ol - low level output voltage (v) t p - propagation delay (ns) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 i o = 16 ma i o = 12.8 ma i o = 6.4 ma i o = 9.6 ma v cc = 5.5 v v e = 2.0 v i f = 5.0 ma fig. 6 low level output current vs. temperature i ol - low level output current (ma) t p - propagation delay (ns) -60 -40 -20 0 20 40 60 80 100 20 30 40 50 60 70 v cc = 5.0 v v e = 2.0 v v ol = 0.6 v i f = 10-15 ma i f = 5 ma fig. 7 propagation delay vs. temperature fig. 8 propagation delay vs. pulse input current -60 -40 -20 0 20 40 60 80 100 0 20 40 60 80 100 v cc = 5.0 v i f = 7.5 ma v cc = 5.0 v t a = 25 ? c t phl, r l = 350 ? , 1 k ? t plh, r l = 350 ? t plh, r l = 1 k ? i f - pulse input current (ma) 5 7 9 11 13 15 30 45 60 75 90 105 120 t plh, r l = 1 k ? t phl, r l = 350 ? , 1 k ? t plh, r l = 350 ? www.fairchildsemi.com 6 of 11 4/30/01 ds300397
high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 fig. 9 typical enable propagation delay vs. temparature t a - temperature ( ? c) t a - temperature ( ? c) t a - temperature ( ? c) -60 -40 -20 0 20 40 60 80 100 t e - enable propagation delay (ns) 0 30 60 90 fig. 10 typical rise and fall time vs. temperature -60 -40 -20 0 20 40 60 80 100 t r, t f - rise, fall time (ns) 0 20 40 60 80 100 120 140 160 180 t rise t fall fig. 11 typical pulse width distortion vs. temperature -60 -40 -20 0 20 40 60 80 100 pwd - pulse width distortion (ns) -10 0 10 20 30 40 v cc = 5.0 v v eh = 3.0 v v el = 0 v i f = 7.5 ma t elh, rl = 1 k ? t elh, rl = 350 ? t ehl, rl = 350 ?, 1 k ? rl = 1 k ? rl = 350 ? rl = 1 k ? rl = 350 ?, 1 k ? v cc = 5.0 v i f = 7.5 ma v cc = 5.0 v i f = 7.5 ma rl = 350 ? ds300397 4/30/01 7 of 11 www.fairchildsemi.com
47 1 phl t f i = 7.5 ma 1.5 v 90% 10% 7.5 ma +5v 1.5 v 3.0 v 1.5 v 3 2 1 4 8 7 6 5 4 5 pulse 1 2 3 generator tr = 5ns z = 50 1 o 8 7 6 +5v gnd plh t i = 3.75 ma f output o (v ) input (i ) f output (v ) o f t r t cc v output (v ) o l r c l (i ) input f monitor o z = 50 pulse generator tr = 5ns 1 (v ) e input monitor gnd v cc o (v ) output l r l c (v ) output o input (v ) e ehl tt elh bypass .1 f e bypass .1 f e fig. 12 test circuit and waveforms for t plh , t phl, t r and t f . fig. 13 test circuit t ehl and t elh . high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 www.fairchildsemi.com 8 of 11 4/30/01 ds300397
+5v peak 3 2 1 4 8 7 6 5 gnd v cc o (v ) output 350 1 v cm ff v a b pulse gen i f cm v 0v o v 5v switching pos. (a), i = 0 f o v (max) cm 0.5 v o v switching pos. (b), i = 7.5 ma f h cm l v (min) o bypass .1 f e fig. 14 test circuit common mode transient immunity high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 ds300397 4/30/01 9 of 11 www.fairchildsemi.com
high speed-10 mbit/s logic gate optocouplers ordering information r1 .r1 tape and reel (500 per reel) r2 .r2 tape and reel (2500 per reel) order entry option identifier description 4.0 0.1 1.5 min user direction of feed 2 0.05 1.75 0.10 5.5 0.05 12.0 0.3 8.0 0.1 0.3 max 8.3 0.1 3.5 0.2 0.1 max 6.4 0.2 5.2 0.2 1.5 + 0.1/-0 carrier tape specifications hcpl-0600 hcpl-0601 www.fairchildsemi.com 10 of 11 4/30/01 ds300397
high speed-10 mbit/s logic gate optocouplers hcpl-0600 hcpl-0601 disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. life support policy fairchild s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body,or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. ds300397 4/30/01 11 of 11 www.fairchildsemi.com

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